Thermal Modeling of Wide and Ultra-wide Bandgap Materials and Devices Through Cellular Monte Carlo

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Description
An efficient thermal solver is available in the CMC that allows modeling self-heating in the electrical simulations, which treats phonons as flux and solves the energy balance equation to quantify thermal effects. Using this solver, thermal simulations were performed on

An efficient thermal solver is available in the CMC that allows modeling self-heating in the electrical simulations, which treats phonons as flux and solves the energy balance equation to quantify thermal effects. Using this solver, thermal simulations were performed on GaN-HEMTs in order to test effect of gate architectures on the DC and RF performance of the device. A Π- gate geometry is found to suppress 19.75% more hot electrons corresponding to a DC power of 2.493 W/mm for Vgs = -0.6V (max transconductance) with respect to the initial T-gate. For the DC performance, the output current, Ids is nearly same for each device configuration over the entire bias range. For the RF performance, the current gain was evaluated over a frequency range 20 GHz to 120 GHz in each device for both thermal (including self-heating) and isothermal (without self-heating). The evaluated cutoff frequency is around 7% lower for the thermal case than the isothermal case. The simulated cutoff frequency closely follows the experimental cutoff frequency. The work was extended to the study of ultra-wide bandgap material (Diamond), where isotope effect causes major deterioration in thermal conductivity. In this case, bulk phonons are modeled as semiclassical particles solving the nonlinear Peierls - Boltzmann transport equation with a stochastic approach. Simulations were performed for 0.001% (ultra-pure), 0.1% and 1.07% isotope concentration (13C) of diamond, showing good agreement with the experimental values. Further investigation was performed on the effect of isotope on the dynamics of individual phonon branches, thermal conductivity and the mean free path, to identify the dominant phonon branch. Acoustic phonons are found to be the principal contributors to thermal conductivity across all isotope concentrations with transverse acoustic (TA2) branch is the dominant branch with a contribution of 40% at room temperature and 37% at 500K. Mean free path computations show the lower bound of device dimensions in order to obtain maximum thermal conductivity. At 300K, the lowest mean free path (which is attributed to Longitudinal Optical phonon) reduces from 24nm to 8 nm for isotope concentration of 0.001% and 1.07% respectively. Similarly, the maximum mean free path (which is attributed to Longitudinal Acoustic phonon) reduces from 4 µm to 3.1 µm, respectively, for the same isotope concentrations. Furthermore, PETSc (Portable, Extensible Toolkit for Scientific Computation) developed by Argonne National Lab, was included in the existing Cellular Monte Carlo device simulator as a Poisson solver to further extend the capability of the simulator. The validity of the solver was tested performing 2D and 3D simulations and the results were compared with the well-established multigrid Poisson solver.
Date Created
2024
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Field Effect Transistors with Emerging Two-Dimensional Semiconductor Channels for Future Complementary-Metal-Oxide-Semiconductor (CMOS) Technologies

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Description
The research of alternative materials and new device architectures to exceed the limits of conventional silicon-based devices has been sparked by the persistent pursuit of semiconductor technology scaling. The development of tungsten diselenide (WSe2) and molybdenum disulfide (MoS2), well-known member

The research of alternative materials and new device architectures to exceed the limits of conventional silicon-based devices has been sparked by the persistent pursuit of semiconductor technology scaling. The development of tungsten diselenide (WSe2) and molybdenum disulfide (MoS2), well-known member of the transition metal dichalcogenide (TMD) family, has made great strides towards ultrascaled two-dimensional (2D) field-effect-transistors (FETs). The scaling issues facing silicon-based complementary metal-oxide-semiconductor (CMOS) technologies can be solved by 2D FETs, which show extraordinary potential.This dissertation provides a comprehensive experimental analysis relating to improvements in p-type metal-oxide-semiconductor (PMOS) FETs with few-layer WSe2 and high-κ metal gate (HKMG) stacks. Compared to this works improved methods, standard metallization (more damaging to underlying channel) results in significant Fermi-level pinning, although Schottky barrier heights remain small (< 100 meV) when using high work function metals. Temperature-dependent analysis reveals a dominant contribution to contact resistance from the damaged channel access region. Thus, through less damaging metallization methods combined with strongly scaled HKMG stacks significant improvements were achieved in contact resistance and PMOS FET overall performance. A clean contact/channel interface was achieved through high-vacuum evaporation and temperature-controlled stepped deposition. Theoretical analysis using a Landauer transport adapted to WSe2 Schottky barrier FETs (SB-FETs) elucidates the prospects of nanoscale 2D PMOS FETs indicating high-performance towards the ultimate CMOS scaling limit. Next, this dissertation discusses how device electrical characteristics are affected by scaling of equivalent oxide thickness (EOT) and by adopting double-gate FET architectures, as well as how this might support CMOS scaling. An improved gate control over the channel is made possible by scaling EOT, improving on-off current ratios, carrier mobility, and subthreshold swing. This study also elucidates the impact of EOT scaling on FET gate hysteresis attributed to charge-trapping effects in high-κ-dielectrics prepared by atomic layer deposition (ALD). These developments in 2D FETs offer a compelling alternative to conventional silicon-based devices and a path for continued transistor scaling. This research contributes to ongoing efforts in 2D materials for future semiconductor technologies. Finally, this work introduces devices based on emerging Janus TMDs and bismuth oxyselenide (Bi2O2Se) layered semiconductors.
Date Created
2023
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Diamond: An Ultra-Wide Band Gap Semiconductor for High Power Applications

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Description
Wide Bandgap (WBG) semiconductor materials are shaping day-to-day technologyby introducing powerful and more energy responsible devices. These materials have opened the door for building basic semiconductor devices which are superior in terms of handling high voltages, high currents, power, and temperature which

Wide Bandgap (WBG) semiconductor materials are shaping day-to-day technologyby introducing powerful and more energy responsible devices. These materials have opened the door for building basic semiconductor devices which are superior in terms of handling high voltages, high currents, power, and temperature which is not possible using conventional silicon technology. As the research continues in the field of WBG based devices, there is a potential chance that the power electronics industry can save billions of dollars deploying energy-efficient circuits in high power conversion electronics. Diamond, silicon carbide and gallium nitride are the top three contenders among which diamond can significantly outmatch others in a variety of properties. However, diamond technology is still in its early phase of development and there are challenges involved in many aspects of processing a successful integrated circuit. The work done in this research addresses three major aspects of problems related to diamond technology. In the first part, the applicability of compact modeling and Technology Computer-Aided Design (TCAD) modeling technique for diamond Schottky p-i-n diodes has been demonstrated. The compact model accurately predicts AC, DC and nonlinear behavior of the diode required for fast circuit simulation. Secondly, achieving low resistance ohmic contact onto n-type diamond is one of the major issues that is still an open research problem as it determines the performance of high-power RF circuits and switching losses in power converters circuits. So, another portion of this thesis demonstrates the achievement of very low resistance ohmic contact (~ 10-4 Ω⋅cm2) onto n-type diamond using nano crystalline carbon interface layer. Using the developed TCAD and compact models for low resistance contacts, circuit level predictions show improvements in RF performance. Lastly, an initial study of breakdown characteristics of diamond and cubic boron nitride heterostructure is presented. This study serves as a first step for making future transistors using diamond and cubic boron nitride – a very less explored material system in literature yet promising for extreme circuit applications involving high power and temperature.
Date Created
2023
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The Implications of a High Reverse Bias Voltage

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Description
This study focuses on the implications of a high reverse bias breakdown in silicon heterojunction cells (SHJ). In relevant literature, there is a lack of explicit investigation which compares high breakdown voltage cells (commonly SHJ) to low breakdown voltage cells

This study focuses on the implications of a high reverse bias breakdown in silicon heterojunction cells (SHJ). In relevant literature, there is a lack of explicit investigation which compares high breakdown voltage cells (commonly SHJ) to low breakdown voltage cells (commonly silicon homojunctions) in an installation setting. In addition, their relationship with shading and how they react with bypass diodes are also not very prevalent. Therefore, my project dives into how shading impacts a string of high breakdown voltage cells and a string of low breakdown voltage cells, as well as how those cells interact with a bypass diode. In order to conduct this investigation, I used the simulation software LTSpice XVII to create an accurate simulation model of a SHJ cell with a 21 V reverse breakdown voltage. With this cell model, I strung 10 cells together, and varied the shading on a single cell while measuring the string’s output current, voltage, and power. Next, I attached a bypass diode to the shaded cell, and continued to increase the number of cells attached to the bypass diode while continuing to examine the string’s output. Once I gathered this data, I modified the original cell model to have a lower reverse breakdown voltage of 5 V. From here, I strung 10 cells together again, and repeated the same measurements from the 21 V string. Upon completing these measurements, I found that the SHJ cells were in fact harder to force into reverse bias than the cells with the lower reverse breakdown voltage, suggesting that solar installation owners should consider transitioning to SHJ-based modules. When bypass diodes are being considered, my results demonstrated that heavy shading (about 65% and higher) was required for the bypass diodes to have an observable impact on the string’s power output. Therefore, owners should consider how severe the shading their installation may receive before investing in bypass diodes. If owners do find the need for the bypass diodes, my findings also show that the diodes should be used sparingly and in a compromise with output power and cost.
Date Created
2023
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Phenomena on Bipolar Junction Transistors in Space: In-Situ Data to Further Humankind's Quest for Expansion

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Description
Linear bipolar circuits, designed with bipolar junction transistors (BJTs), are particularly vulnerable to the effects of space radiation. These circuits, which are usually commercial off-the-shelf (COTS) components, typically exhibit Enhanced Low Dose Rate Sensitivity (ELDRS), which is characterized by the

Linear bipolar circuits, designed with bipolar junction transistors (BJTs), are particularly vulnerable to the effects of space radiation. These circuits, which are usually commercial off-the-shelf (COTS) components, typically exhibit Enhanced Low Dose Rate Sensitivity (ELDRS), which is characterized by the enhancement of degradation when parts are exposed to radiation at low dose rates as compared to high dose rates. This phenomenon poses significant problems for the qualification of bipolar parts for use in low dose rate environments, such as most Earth orbits. ELDRS in BJTs has been well-documented in ground-based experiments; however, the effects of low dose rate irradiation on bipolar transistors manufactured in an integrated linear process had never been characterized in space - until the ELDRS experiment was launched in June 2019. The ELDRS instrument measures changes in the active collector and base currents in 24 lateral PNP (LPNP) BJTs on eight packaged die (three BJTs per die). Sixteen of the 24 BJTs are gated, while eight are standard, un-gated LPNPs. Device Under Test (DUT) and measurement variables include oxide thickness, passivation layer, packaging conditions, and gate voltage. This thesis reports the results obtained after more than 20 months of space flight in a highly elliptical Earth orbit. These results demonstrate that this category of bipolar devices is susceptible to low dose rate exposures and therefore exhibits the ELDRS effect in an actual space environment. This thesis also assess the impact of packaging variables on radiation response and examines one of the major causes behind radiation degradation, interface traps. An understanding of radiation effects in real space environments is critical for future missions that use these low-cost COTS bipolar technologies, making these results highly relevant for the satellite community.
Date Created
2023
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Modeling Electrostatics and Low-field Electron Mobility in GaN FinFETs

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Description
Gallium Nitride (GaN) is uniquely suited for Radio Frequency (RF) and power electronic applications due to its intrinsically high saturation velocity and high mobility compared to Silicon and Silicon Carbide (SiC). High Electron Mobility Transistors (HEMTs) have remained the primary

Gallium Nitride (GaN) is uniquely suited for Radio Frequency (RF) and power electronic applications due to its intrinsically high saturation velocity and high mobility compared to Silicon and Silicon Carbide (SiC). High Electron Mobility Transistors (HEMTs) have remained the primary topology for GaN transistors in RF applications. However, GaN HEMTs suffer from a variety of issues such as current crowding, lack of enhancement mode (E-Mode) operation and non-linearity. These drawbacks slow the widespread adoption of GaN devices for ultra-low voltage (ULV) applications such as voltage regulators, automotive and computing applications. E-mode operation is especially desired in low-voltage high frequency switching applications. In this context, Fin Field Effect Transistors (FinFETs) offer an alternative topology for ULV applications as opposed to conventional HEMTs. Recent advances in material processing, high aspect ratio epitaxial growth and etching methods has led to an increased interest in 3D nanostructures such as Nano-FinFETs and Nanowire FETs. A typical 3D nano-FinFET is the AlGaN/GaN Metal Insulator Semiconductor (MIS) FET wherein a layer of Al2O3 surrounds the AlGaN/GaN fin. The presence of the side gates leads to additional lateral confinement of the 2D Electron Gas (2DEG). Theoretical calculations of transport properties in confined systems such as AlGaN/GaN Finfets are scarce compared to those of their planar HEMT counterparts. A novel simulator is presented in this dissertation, which employs self-consistent solution of the coupled 1D Boltzmann – 2D Schrödinger – 3D Poisson problem, to yield the channel electrostatics and the low electric field transport characteristics of AlGaN/GaN MIS FinFETs. The low field electron mobility is determined by solving the Boltzmann transport equation in the Quasi-1D region using 1D Ensemble Monte Carlo method. Three electron-phonon scattering mechanisms (acoustic, piezoelectric and polar optical phonon scattering) and interface roughness scattering at the AlGaN/GaN interface are considered in this theoretical model. Simulated low-field electron mobility and its temperature dependence are in agreement with experimental data reported in the literature. A quasi-1D version of alloy clustering model is derived and implemented and the limiting effect of alloy clustering on the low-field electron mobility is investigated for the first time for MIS FinFET device structures.
Date Created
2022
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Fabrication of Interdigitated Back Contact Cell Towards making Three Terminal Silicon Based Tandem Cell

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Description
Interdigitated back contact (IBC) solar cells have achieved the highest single junction silicon wafer-based solar cell power conversion efficiencies reported to date. This thesis is about the fabrication of a high-efficiency silicon heterojunction IBC solar cell for potential use as

Interdigitated back contact (IBC) solar cells have achieved the highest single junction silicon wafer-based solar cell power conversion efficiencies reported to date. This thesis is about the fabrication of a high-efficiency silicon heterojunction IBC solar cell for potential use as the bottom cell for a 3-terminal lattice-matched dilute-nitride Ga (In)NP(As)/Si monolithic tandem solar cell. An effective fabrication process has been developed and the process challenges related to open circuit voltage (Voc), series resistance (Rs), and fill factor (FF) are experimentally analyzed. While wet etching, the sample lost the initial passivation, and by changing the etchant solution and passivation process, the voltage at maximum power recovered to an initial value of over 710 mV before metallization. The factors reducing the series resistance loss in IBC cells were also studied. One of these factors was the Indium Tin Oxide (ITO) sputtering parameters, which impact the conductivity of the ITO layer and transport across the a-Si:H/ITO interface. For the standard recipe, the chamber pressure was 3.5 mTorr with no oxygen partial pressure, and the thickness of the ITO layer in contact with the a-Si:H layers, was optimized to 150 nm. The patterning method for the metal contacts and final annealing also change the contact resistance of the base and emitter stack layers. The final annealing step is necessary to recover the sputtering damage; however, the higher the annealing time the higher the final IBC series resistance. The best efficiency achieved was 19.3% (Jsc = 37 mA/cm2, Voc = 691 mV, FF = 71.7%) on 200 µm thick 1-15 Ω-cm n-type CZ C-Si with a designated area of 4 cm2.
Date Created
2022
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Second Harmonic Generation at Plasmonic Interfaces and Its Interactions with Quantum Emitters Under Strong Coupling Conditions

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Description
In the developing field of nonlinear plasmonics, it is important to understand the nonlinear responses of the metallic nanostructures. In the present thesis, rigorous electrodynamical simulations based on the fully vectorial three-dimensional nonlinear hydrodynamic Drude model describing metal coupled to

In the developing field of nonlinear plasmonics, it is important to understand the nonlinear responses of the metallic nanostructures. In the present thesis, rigorous electrodynamical simulations based on the fully vectorial three-dimensional nonlinear hydrodynamic Drude model describing metal coupled to Maxwell's equations are performed to investigate linear and nonlinear responses of the plasmonic materials and their coupling with quantum emitters.The first part of this thesis is devoted to analyzing properties of the localized surface plasmon resonances of metallic nanostructures and their nonlinear optical responses. The behavior of the second harmonic is investigated as a function of various physical parameters at different plasmonic interfaces, revealing highly complex dynamics. By collaborating with several research teams, simulations are proven to be in close agreement with experiments, both quantitative and qualitative. The second part of the thesis explores the strong coupling regime and its influence on the second harmonic generation. Considering plasmonic systems of molecules and periodic nanohole arrays on equal footing in the nonlinear regime is done for the first time. The results obtained are supported by a simple analytical model.
Date Created
2022
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High Efficiency Monolithic Solar Cell with Reduced Forward Bias Current: Theory, Design and Application

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Description
As the single-junction silicon solar cell is approaching its theoretical efficiency limits, the loss from shading and resistance is gaining increasing attention. The metal grid pattern may cause an efficiency loss up to 1–3%abs (absolute percentage) depending on the grid’s

As the single-junction silicon solar cell is approaching its theoretical efficiency limits, the loss from shading and resistance is gaining increasing attention. The metal grid pattern may cause an efficiency loss up to 1–3%abs (absolute percentage) depending on the grid’s materials and structure.Many attempts have been proposed to reduce the loss caused by the contacts and module. Among them, the monolithic solar cell, which is a solar cell with multiple string cells on the same wafer and connected in a series, presents advantages of low output current, busbar-free contact, minimized interconnection space, and ohmic loss reduction. However, this structure also introduces a lateral forward bias current through the base region, which severely degrades the cell’s performance. In addition, this interconnection in the base region has partially shunted certain solar cells in the monolithic cell, which created a mismatch between string cells. For the last few decades, researchers have used different methods such as etching trenches or enlarging the distance between the neighboring string cells to solve this problem. However, these methods were both ineffective and defective. In this work, a novel method of suppressing the lateral forward bias current is proposed. By adding a very high surface recombination to the mid-region between the string cells, the carrier density in the mid-region can be decreased close to the doping density. Thus, the resistivity in the mid-region can be increased tenfold or more. As a result, the lateral forward bias current is greatly reduced. Other methods to reduce lateral forward bias current include optimizing the width of the mid-region, shading the mid-region, reducing the base doping and base thickness which can be used to reduce the mismatch as well. Another method has been proposed to calculate the minimum efficiency loss of a monolithic cell compared to the baseline solar cell. As a result, the monolithic cell could potentially gain more advantages over the baseline solar cells with a thinner and low-doped wafer. A monolithic solar cell with innovative designs is presented in this work which shows an efficiency that is potentially higher than that of normal solar cells.
Date Created
2022
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Dilute Nitride Materials for High Efficiency Si-Based Multi-Junction Solar Cells

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Description
To keep up with the increasing demand for solar energy, higher efficiencies are necessary while keeping cost at a minimum. The easiest theoretical way to achieve that is using silicon-based multi-junction solar cells. However, there are major challenges in effectively

To keep up with the increasing demand for solar energy, higher efficiencies are necessary while keeping cost at a minimum. The easiest theoretical way to achieve that is using silicon-based multi-junction solar cells. However, there are major challenges in effectively implementing such a system. Much work has been done recently to integrate III-V with Si for multi-junction solar cell purposes. The focus of this paper is to explore GaP-based dilute nitrides as a possible top cell candidate for Si-based multi-junctions. The direct growth of dilute nitrides in a lattice-matched configuration epitaxially in literature is reviewed. The problems associated with such growths are outlined and pathways to mitigate these problems are presented. The need for a GaP buffer layer between the dilute nitride film and Si is established. Defects in GaP/Si system are explored in detail and a study on pit formation during such growth is performed. Effective suppression of pits in GaP surface grown on Si is achieved. Issues facing GaP-based dilute nitrides in terms of material properties are outlined. Review of these challenges is done and some possible future areas of interest to improve material quality are established. Finally, the growth process of dilute nitrides using Molecular Beam Epitaxy tool is explained. Results for GaNP grown on Si pre and post growth treatments are detailed.
Date Created
2022
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