Semiconductor devices often face reliability issues due to their operational con-

ditions causing performance degradation over time. One of the root causes of such

degradation is due to point defect dynamics and time dependent changes in their

chemical nature. Previously developed Unified Solver was successful in explaining

the copper (Cu) metastability issues in cadmium telluride (CdTe) solar cells. The

point defect formalism employed there could not be extended to chlorine or arsenic

due to numerical instabilities with the dopant chemical reactions. To overcome these

shortcomings, an advanced version of the Unified Solver called PVRD-FASP tool was

developed. This dissertation presents details about PVRD-FASP tool, the theoretical

framework for point defect chemical formalism, challenges faced with numerical al-

gorithms, improvements for the user interface, application and/or validation of the

tool with carefully chosen simulations, and open source availability of the tool for the

scientific community.

Treating point defects and charge carriers on an equal footing in the new formalism

allows to incorporate chemical reaction rate term as generation-recombination(G-R)

term in continuity equation. Due to the stiff differential equations involved, a reaction

solver based on forward Euler method with Newton step is proposed in this work.

The Jacobian required for Newton step is analytically calculated in an elegant way

improving speed, stability and accuracy of the tool. A novel non-linear correction

scheme is proposed and implemented to resolve charge conservation issue.

The proposed formalism is validated in 0-D with time evolution of free carriers

simulation and with doping limits of Cu in CdTe simulation. Excellent agreement of

light JV curves calculated with PVRD-FASP and Silvaco Atlas tool for a 1-D CdTe

solar cell validates reaction formalism and tool accuracy. A closer match with the Cu

SIMS profiles of Cu activated CdTe samples at four different anneal recipes to the

simulation results show practical applicability. A 1D simulation of full stack CdTe

device with Cu activation at 350C 3min anneal recipe and light JV curve simulation

demonstrates the tool capabilities in performing process and device simulations. CdTe

device simulation for understanding differences between traps and recombination

centers in grain boundaries demonstrate 2D capabilities.

Silicon photovoltaics is the dominant contribution to the global solar energy production. As increasing conversion efficiency has become one of the most important factors to lower the cost of photovoltaic systems, the idea of making a multijunction solar cell based on a silicon bottom cell has attracted broad interest. Here the potential of using dilute nitride GaNPAs alloys for a lattice-matched 3-terminal 2-junction Si-based tandem solar cell through multiscale modeling is investigated. To calculate the electronic band structure of dilute nitride alloys with relatively low computational cost, the sp^3 d^5 s^* s_N tight-binding model is chosen, as it has been demonstrated to obtain quantitatively correct trends for the lowest conduction band near Γ, L, and X for dilute-N GaNAs. A genetic algorithm is used to optimize the sp^3 d^5 s^* tight-binding model for pure GaP and GaAs for their optical properties. Then the optimized sp^3 d^5 s^* s_N parametrizations are obtained for GaNP and GaNAs by fitting to experimental bandgap values. After that, a virtual crystal approach gives the Hamiltonian for GaNPAs alloys. From their tight-binding Hamiltonian, the first-order optical response functions of dilute nitride GaNAs, GaNP, and GaNPAs are calculated. As the N mole fraction varies, the calculated critical optical features vary with the correct trends, and agree well with experiment. The calculated optical properties are then used as input for the solar device simulations based on Silvaco ATLAS. For device simulation, a bottom cell model is first constructed to generate performance results that agree well with a demonstrated high-efficiency Si heterojunction interdigitated back contact (IBC) solar cell reported by Kaneka. The front a-Si/c-Si interface is then replaced by a GaP/Si interface for the investigation of the sensitivity of the GaP/Si interface to interface defects in terms of degradation of the IBC cell performance, where we find that an electric field that induces strong band bending can significantly mitigate the impact of the interfacial traps. Finally, a lattice-matched 3-terminal 2-junction tandem model is built for performance simulation by stacking a dilute nitride GaNP(As) cell on the Si IBC cell connected through a GaP/Si interface. The two subcells operate quasi-independently. In this 3-terminal tandem model, traps at the GaP/Si interface still significantly impact the performance of the Si subcell, but their effects on the GaNP subcell are relatively small. Assuming the interfacial traps are well passivated, the tandem efficiency surpasses that of a single-junction Si cell, with values close to 33% based on realistic parameters.

Silicon photonic technology continues to dominate the solar industry driven by steady improvement in device and module efficiencies. Currently, the world record conversion efficiency (~26.6%) for single junction silicon solar cell technologies is held by silicon heterojunction (SHJ) solar cells based on hydrogenated amorphous silicon (a-Si:H) and crystalline silicon (c-Si). These solar cells utilize the concept of carrier selective contacts to improve device efficiencies. A carrier selective contact is designed to optimize the collection of majority carriers while blocking the collection of minority carriers. In the case of SHJ cells, a thin intrinsic a-Si:H layer provides crucial passivation between doped a-Si:H and the c-Si absorber that is required to create a high efficiency cell. There has been much debate regarding the role of the intrinsic a-Si:H passivation layer on the transport of photogenerated carriers, and its role in optimizing device performance. In this work, a multiscale model is presented which utilizes different simulation methodologies to study interfacial transport across the intrinsic a-Si:H/c-Si heterointerface and through the a-Si:H passivation layer. In particular, an ensemble Monte Carlo simulator was developed to study high field behavior of photogenerated carriers at the intrinsic a-Si:H/c-Si heterointerface, a kinetic Monte Carlo program was used to study transport of photogenerated carriers across the intrinsic a-Si:H passivation layer, and a drift-diffusion model was developed to model the behavior in the quasi-neutral regions of the solar cell. This work reports de-coupled and self-consistent simulations to fully understand the role and effect of transport across the a-Si:H passivation layer in silicon heterojunction solar cells, and relates this to overall solar cell device performance.

Gallium Nitride (GaN) based Current Aperture Vertical Electron Transistors (CAVETs) present many appealing qualities for applications in high power, high frequency devices. The wide bandgap, high carrier velocity of GaN make it ideal for withstanding high electric fields and supporting large currents. The vertical topology of the CAVET allows for more efficient die area utilization, breakdown scaling with the height of the device, and burying high electric fields in the bulk where they will not charge interface states that can lead to current collapse at higher frequency.

Though GaN CAVETs are promising new devices, they are expensive to develop due to new or exotic materials and processing steps. As a result, the accurate simulation of GaN CAVETs has become critical to the development of new devices. Using Silvaco Atlas 5.24.1.R, best practices were developed for GaN CAVET simulation by recreating the structure and results of the pGaN insulated gate CAVET presented in chapter 3 of [8].

From the results it was concluded that the best simulation setup for transfer characteristics, output characteristics, and breakdown included the following. For methods, the use of Gummel, Block, Newton, and Trap. For models, SRH, Fermi, Auger, and impact selb. For mobility, the use of GANSAT and manually specified saturation velocity and mobility (based on doping concentration). Additionally, parametric sweeps showed that, of those tested, critical CAVET parameters included channel mobility (and thus doping), channel thickness, Current Blocking Layer (CBL) doping, gate overlap, and aperture width in rectangular devices or diameter in cylindrical devices.

In this dissertation, I investigate the electronic properties of two important silicon(Si)-based heterojunctions 1) hydrogenated amorphous silicon/crystalline silicon (a-Si:H/c-Si) which has already been commercialized in Heterojunction with Intrinsic Thin-layer (HIT) cells and 2) gallium phosphide/silicon (GaP/Si) which has been suggested to be a good candidate for replacing a-Si:H/c-Si in HIT cells in order to boost the HIT cell’s efficiency.

In the first part, the defect states of amorphous silicon (a-Si) and a-Si:H material are studied using density functional theory (DFT). I first employ simulated annealing using molecular dynamics (MD) to create stable configurations of a-Si:H, and then analyze the atomic and electronic structure to investigate which structural defects interact with H, and how the electronic structure changes with H addition. I find that H atoms decrease the density of mid-gap states and increase the band gap of a-Si by binding to Si atoms with strained bonds. My results also indicate that Si atoms with strained bonds creates high-localized orbitals in the mobility gap of a-Si, and the binding of H atoms to them can dramatically decrease their degree of localization.



In the second part, I explore the effect of the H binding configuration on the electronic properties of a-Si:H/c-Si heterostructure using density functional theory studies of models of the interface between a-Si:H and c-Si. The electronic properties from DFT show that depending on the energy difference between configurations, the electronic properties are sensitive to the H binding configurations.

In the last part, I examine the electronic structure of GaP/Si(001) heterojunctions and the effect of hydrogen H passivation at the interface in comparison to interface mixing, through DFT calculations. My calculations show that due to the heterovalent mismatch nature of the GaP/Si interface, there is a high density of localized states at the abrupt GaP/Si interface due to the excess charge associated with heterovalent bonding, as reported elsewhere. I find that the addition of H leads to additional bonding at the interface which mitigates the charge imbalance, and greatly reduces the density of localized states, leading to a nearly ideal heterojunction.

Wide bandgap (WBG) semiconductors GaN (3.4 eV), Ga2O3 (4.8 eV) and AlN (6.2 eV), have gained considerable interests for energy-efficient optoelectronic and electronic applications in solid-state lighting, photovoltaics, power conversion, and so on. They can offer unique device performance compared with traditional semiconductors such as Si. Efficient GaN based light-emitting diodes (LEDs) have increasingly displaced incandescent and fluorescent bulbs as the new major light sources for lighting and display. In addition, due to their large bandgap and high critical electrical field, WBG semiconductors are also ideal candidates for efficient power conversion.

In this dissertation, two types of devices are demonstrated: optoelectronic and electronic devices. Commercial polar c-plane LEDs suffer from reduced efficiency with increasing current densities, knowns as “efficiency droop”, while nonpolar/semipolar LEDs exhibit a very low efficiency droop. A modified ABC model with weak phase space filling effects is proposed to explain the low droop performance, providing insights for designing droop-free LEDs. The other emerging optoelectronics is nonpolar/semipolar III-nitride intersubband transition (ISBT) based photodetectors in terahertz and far infrared regime due to the large optical phonon energy and band offset, and the potential of room-temperature operation. ISBT properties are systematically studied for devices with different structures parameters.

In terms of electronic devices, vertical GaN p-n diodes and Schottky barrier diodes (SBDs) with high breakdown voltages are homoepitaxially grown on GaN bulk substrates with much reduced defect densities and improved device performance. The advantages of the vertical structure over the lateral structure are multifold: smaller chip area, larger current, less sensitivity to surface states, better scalability, and smaller current dispersion. Three methods are proposed to boost the device performances: thick buffer layer design, hydrogen-plasma based edge termination technique, and multiple drift layer design. In addition, newly emerged Ga2O3 and AlN power electronics may outperform GaN devices. Because of the highly anisotropic crystal structure of Ga2O3, anisotropic electrical properties have been observed in Ga2O3 electronics. The first 1-kV-class AlN SBDs are demonstrated on cost-effective sapphire substrates. Several future topics are also proposed including selective-area doping in GaN power devices, vertical AlN power devices, and (Al,Ga,In)2O3 materials and devices.

High-k dielectrics have been employed in the metal-oxide semiconductor field effect transistors (MOSFETs) since 45 nm technology node. In this MOSFET industry, Moore’s law projects the feature size of MOSFET scales half within every 18 months. Such scaling down theory has not only led to the physical limit of manufacturing but also raised the reliability issues in MOSFETs. After the incorporation of HfO2 based high-k dielectrics, the stacked oxides based gate insulator is facing rather challenging reliability issues due to the vulnerable HfO2 layer, ultra-thin interfacial SiO2 layer, and even messy interface between SiO2 and HfO2. Bias temperature instabilities (BTI), hot channel electrons injections (HCI), stress-induced leakage current (SILC), and time dependent dielectric breakdown (TDDB) are the four most prominent reliability challenges impacting the lifetime of the chips under use.

In order to fully understand the origins that could potentially challenge the reliability of the MOSFETs the defects induced aging and breakdown of the high-k dielectrics have been profoundly investigated here. BTI aging has been investigated to be related to charging effects from the bulk oxide traps and generations of Si-H bonds related interface traps. CVS and RVS induced dielectric breakdown studies have been performed and investigated. The breakdown process is regarded to be related to oxygen vacancies generations triggered by hot hole injections from anode. Post breakdown conduction study in the RRAM devices have shown irreversible characteristics of the dielectrics, although the resistance could be switched into high resistance state.

In this thesis, the methods of aluminum electroplating in an ionic liquid for silicon solar cell front side metallization were studied. It focused on replacing the current silver screen printing with an alternative metallization technology using a low-cost Earth-abundant metal for mass production, due to the high cost and limited availability of silver. A conventional aluminum electroplating method was employed for silicon solar cells fabrication on both p-type and n-type substrates. The highest efficiency of 17.9% was achieved in the n-type solar cell with a rear junction, which is comparable to that of the same structure cell with screen printed silver electrodes from industrial production lines. It also showed better spiking resistant performance than the common structure p-type solar cell. Further efforts were put on the development of a novel light-induced plating of aluminum technique. The aluminum was deposited directly on a silicon substrate without the assistance of a conductive seed layer, thus simplified and reduced the process cost. The plated aluminum has good adhesion to the silicon surface with the resistivity as low as 4×10–6 -cm. A new demo tool was designed and set up for the light-induced plating experiment, aiming to utilize this technique in large-size solar cells fabrication and mass production. Besides the metallization methods, a comprehensive sensitivity analysis for the efficiency dispersion in the production of crystalline-Si solar cells was presented based on numerical simulations. Temperature variation in the diffusion furnace was the most significant cause of the efficiency dispersion. It was concluded that a narrow efficiency range of ±0.5% absolute is achievable if the emitter diffusion temperature is confined to a 13˚C window, while other cell parameters vary within their normal windows. Possible methods to minimize temperature variation in emitter diffusion were proposed.

Scaling of the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) towards shorter channel lengths, has lead to an increasing importance of quantum effects on the device performance. Until now, a semi-classical model based on Monte Carlo method for instance, has been sufficient to address these issues in silicon, and arrive at a reasonably good fit to experimental mobility data. But as the semiconductor world moves towards 10nm technology, many of the basic assumptions in this method, namely the very fundamental Fermi’s golden rule come into question. The derivation of the Fermi’s golden rule assumes that the scattering is infrequent (therefore the long time limit) and the collision duration time is zero. This thesis overcomes some of the limitations of the above approach by successfully developing a quantum mechanical simulator that can model the low-field inversion layer mobility in silicon MOS capacitors and other inversion layers as well. It solves for the scattering induced collisional broadening of the states by accounting for the various scattering mechanisms present in silicon through the non-equilibrium based near-equilibrium Green’s Functions approach, which shall be referred to as near-equilibrium Green’s Function (nEGF) in this work. It adopts a two-loop approach, where the outer loop solves for the self-consistency between the potential and the subband sheet charge density by solving the Poisson and the Schrödinger equations self-consistently. The inner loop solves for the nEGF (renormalization of the spectrum and the broadening of the states), self-consistently using the self-consistent Born approximation, which is then used to compute the mobility using the Green-Kubo Formalism.

Thin-film modules of all technologies often suffer from performance degradation over time. Some of the performance changes are reversible and some are not, which makes deployment, testing, and energy-yield prediction more challenging. The most commonly alleged causes of instability in CdTe device, such as “migration of Cu,” have been investigated rigorously over the past fifteen years. As all defects, intrinsic or extrinsic, interact with the electrical potential and free carriers so that charged defects may drift in the electric field and changing ionization state with excess free carriers. Such complexity of interactions in CdTe makes understanding of temporal changes in device performance even more challenging. The goal of the work in this dissertation is, thus, to eliminate the ambiguity between the observed performance changes under stress and their physical root cause by enabling a depth of modeling that takes account of diffusion and drift at the atomistic level coupled to the electronic subsystem responsible for a PV device’s function. The 1D Unified Solver, developed as part of this effort, enables us to analyze PV devices at a greater depth.

In this dissertation, the implementation of a drift-diffusion model defect migration simulator, development of an implicit reaction scheme for total mass conservation, and a couple of other numerical schemes to improve the overall flexibility and robustness of this coupled Unified Solver is discussed. Preliminary results on Cu (with or without Cl-treatment) annealing simulations in both single-crystal CdTe wafer and poly-crystalline CdTe devices show promising agreement to experimental findings, providing a new perspective in the research of improving doping concentration hence the open-circuit voltage of CdTe technology. Furthermore, on the reliability side, in agreement of previous experimental reports, simulation results suggest possibility of Cu depletion in short-circuited cells stressed at elevated temperature. The developed solver also successfully demonstrated that mobile donor migration can be used to explain solar cell performance changes under different stress conditions.