Global Positioning System (GPS) is a navigation system widely used in civilian and military application, but its accuracy is highly impacted with consequential fading, and possible loss of communication due to multipath propagation and high power interferences. This dissertation proposes alternatives to improve the performance of the GPS receivers to obtain a system that can be reliable in critical situations. The basic performance of the GPS receiver consists of receiving the signal with an antenna array, delaying the signal at each antenna element, weighting the delayed replicas, and finally, combining the weighted replicas to estimate the desired signal. Based on these, three modifications are proposed to improve the performance of the system. The first proposed modification is the use of the Least Mean Squares (LMS) algorithm with two variations to decrease the convergence time of the classic LMS while achieving good system stability. The results obtained by the proposed LMS demonstrate that the algorithm can achieve the same stability as the classic LMS using a small step size, and its convergence rate is better than the classic LMS using a large step size. The second proposed modification is to replace the uniform distribution of the time delays (or taps) by an exponential distribution that decreases the bit-error rate (BER) of the system without impacting the computational efficiency of the uniform taps. The results show that, for a BER of 0.001, the system can operate with a 1 to 2 dB lower signal-to-noise ratio (SNR) when an exponential distribution is used rather than a uniform distribution. Finally, the third modification is implemented in the design of the antenna array. In this case, the gain of each microstrip element is enhanced by embedding ferrite rings in the substrate, creating a hybrid substrate. The ferrite rings generates constructive interference between the incident and reflected fields; consequently, the gain of a single microstrip element is enhanced by up to 4 dB. When hybrid substrates are used in microstrip element arrays, a significant enhancement in angle range is achieved for a given reflection coefficient compared to using a conventional substrate.

Multiport antennas offer greater design flexibility than traditional one-port designs. An antenna array is a special case of a multiport antenna. If the antenna's inter-element spacing is electrically small, the antenna is capable of achieving superdirectivity. Superdirective antenna arrays are known to be narrow band and have low radiation resistance which leads to low radiation efficiency and high VSWR. However, by increasing the self-impedance of the antenna elements, the radiation resistance is increased but the bandwidth remains narrow. A design methodology is developed using the ability to superimpose electric fields and multi-objective optimization to design antenna feed networks. While the emphasis in this dissertation is on antenna arrays and superdirectivity, the design methodology is general and can be applied to other multiport antennas. The design methodology is used to design a multiport impedance-matching network and optimize both the input impedance and radiation pattern of a two-port superdirective antenna array. It is shown that the multiport impedance-matching network is capable of improving the input impedance of the antenna array while maintaining high directionality. The antenna design is critical for the methodology to improve the bandwidth and radiation characteristics of the array. To double the bandwidth of the two-port impedance matched superdirective antenna array, a three-port Yagi-Uda antenna design is demonstrated. The addition of the extra antenna element does not increase the footprint of the antenna array. The design methodology is then used to design a symmetrical antenna array capable of steering its main beam in two directions.

This thesis summarizes the research work carried out on design, modeling and simulation of semiconductor nanophotonic devices. The research includes design of nanowire (NW) lasers, modeling of active plasmonic waveguides, design of plasmonic nano-lasers, and design of all-semiconductor plasmonic systems. For the NW part, a comparative study of electrical injection in the longitudinal p-i-n and coaxial p-n core-shell NWs was performed. It is found that high density carriers can be efficiently injected into and confined in the core-shell structure. The required bias voltage and doping concentrations in the core-shell structure are smaller than those in the longitudinal p-i-n structure. A new device structure with core-shell configuration at the p and n contact regions for electrically driven single NW laser was proposed. Through a comprehensive design trade-off between threshold gain and threshold voltage, room temperature lasing has been proved in the laser with low threshold current and large output efficiency. For the plasmonic part, the propagation of surface plasmon polariton (SPP) in a metal-semiconductor-metal structure where semiconductor is highly excited to have an optical gain was investigated. It is shown that near the resonance the SPP mode experiences an unexpected giant modal gain that is 1000 times of the material gain in the semiconductor and the corresponding confinement factor is as high as 105. The physical origin of the giant modal gain is the slowing down of the average energy propagation in the structure. Secondly, SPP modes lasing in a metal-insulator-semiconductor multi-layer structure was investigated. It is shown that the lasing threshold can be reduced by structural optimization. A specific design example was optimized using AlGaAs/GaAs/AlGaAs single quantum well sandwiched between silver layers. This cavity has a physical volume of 1.5×10-4 λ03 which is the smallest nanolaser reported so far. Finally, the all-semiconductor based plasmonics was studied. It is found that InAs is superior to other common semiconductors for plasmonic application in mid-infrared range. A plasmonic system made of InAs, GaSb and AlSb layers, consisting of a plasmonic source, waveguide and detector was proposed. This on-chip integrated system is realizable in a single epitaxial growth process.