Miniaturization of microdevices comes at the cost of increased circuit complexity and operating current densities. At high current densities, the resulting electron wind imparts a large momentum to metal ions triggering electromigration which leads to degradation of interconnects and solder, ultimately resulting in circuit failure. Although electromigration-induced defects in electronic materials can manifest in several forms, the formation of voids is a common occurrence. This research aims at understanding the morphological evolution of voids under electromigration by formulating a diffuse interface approach that accounts for anisotropic mobility in the metallic interconnect. Based on an extensive parametric study, this study reports the conditions under which pancaking of voids or the novel void ‘swimming’ regimes are observed. Finally, inferences are drawn to formulate strategies using which the reliability of interconnects can be improved.