Overhead high voltage transmission lines are widely used around the world to deliver power to customers because of their low losses and high transmission capability. Well-coordinated insulation systems are capable of withstanding lightning and switching surge voltages. However, flashover is a serious issue to insulation systems, especially if the insulator is covered by a pollution layer. Many experiments in the laboratory have been conducted to investigate this issue. Since most experiments are time-consuming and costly, good mathematical models could contribute to predicting the insulator flashover performance as well as guide the experiments. This dissertation proposes a new statistical model to calculate the flashover probability of insulators under different supply voltages and contamination levels. An insulator model with water particles in the air is simulated to analyze the effects of rain and mist on flashover performance in reality. Additionally, insulator radius and number of sheds affect insulator surface resistivity and leakage distance. These two factors are studied to improve the efficiency of insulator design. This dissertation also discusses the impact of insulator surface hydrophobicity on flashover voltage.

Because arc propagation is a stochastic process, an arc could travel on different paths based on the electric field distribution. Some arc paths jump between insulator sheds instead of travelling along the insulator surfaces. The arc jumping could shorten the leakage distance and intensify the electric field. Therefore, the probabilities of arc jumping at different locations of sheds are also calculated in this dissertation.

The new simulation model is based on numerical electric field calculation and random walk theory. The electric field is calculated by the variable-grid finite difference method. The random walk theory from the Monte Carlo Method is utilized to describe the random propagation process of arc growth. This model will permit insulator engineers to design the reasonable geometry of insulators, to reduce the flashover phenomena under a wide range of operating conditions.

Transmission voltages worldwide are increasing to accommodate higher power transfer from power generators to load centers. Insulator dimensions cannot increase linearly with the voltage, as supporting structures become too tall and heavy. Therefore, it is necessary to optimize the insulator design considering all operating conditions including dry, wet and contaminated. In order to design insulators suitably, a better understanding of the insulator flashover is required, as it is a serious issue regarding the safe operation of power systems. However, it is not always feasible to conduct field and laboratory studies due to limited time and money.

The desire to accurately predict the performance of insulator flashovers requires mathematical models. Dynamic models are more appropriate than static models in terms of the instantaneous variation of arc parameters. In this dissertation, a dynamic model including conditions for arc dynamics, arc re-ignition and arc motion with AC supply is first developed.

For an AC power source, it is important to consider the equivalent shunt capacitance in addition to the short circuit current when evaluating pollution test results. By including the power source in dynamic models, the effects of source parameters on the leakage current waveform, the voltage drop and the flashover voltage were systematically investigated. It has been observed that for the same insulator under the same pollution level, there is a large difference among these flashover performances in high voltage laboratories and real power systems. Source strength is believed to be responsible for this discrepancy. Investigations of test source strength were conducted in this work in order to study its impact on different types of insulators with a variety of geometries.

Traditional deterministic models which have been developed so far can only predict whether an insulator would flashover or withstand. In practice, insulator flashover is a statistical process, given that both pollution severity and flashover voltage are probabilistic variables. A probability approach to predict the insulator flashover likelihood is presented based on the newly developed dynamic model.

A novel integrated constant current LED driver design on a single chip is developed in this dissertation. The entire design consists of two sections. The first section is a DC-DC switching regulator (boost regulator) as the frontend power supply; the second section is the constant current LED driver system.

In the first section, a pulse width modulated (PWM) peak current mode boost regulator is utilized. The overall boost regulator system and its related sub-cells are explained. Among them, an original error amplifier design, a current sensing circuit and slope compensation circuit are presented.

In the second section – the focus of this dissertation – a highly accurate constant current LED driver system design is unveiled. The detailed description of this highly accurate LED driver system and its related sub-cells are presented. A hybrid PWM and linear current modulation scheme to adjust the LED driver output currents is explained. The novel design ideas to improve the LED current accuracy and channel-to-channel output current mismatch are also explained in detail. These ideas include a novel LED driver system architecture utilizing 1) a dynamic current mirror structure and 2) a closed loop structure to keep the feedback loop of the LED driver active all the time during both PWM on-duty and PWM off-duty periods. Inside the LED driver structure, the driving amplifier with a novel slew rate enhancement circuit to dramatically accelerate its response time is also presented.

Digital systems are essential to the technological advancements in space exploration. Microprocessor and flash memory are the essential parts of such a digital system. Space exploration requires a special class of radiation hardened microprocessors and flash memories, which are not functionally disrupted in the presence of radiation. The reference design ‘HERMES’ is a radiation-hardened microprocessor with performance comparable to commercially available designs. The reference design ‘eFlash’ is a prototype of soft-error hardened flash memory for configuring Xilinx FPGAs. These designs are manufactured using a foundry bulk CMOS 90-nm low standby power (LP) process. This thesis presents the post-silicon validation results of these designs.

With the growing importance of underground power systems and the need for greater reliability of the power supply, cable monitoring and accurate fault location detection has become an increasingly important issue. The presence of inherent random fluctuations in power system signals can be used to extract valuable information about the condition of system equipment. One such component is the power cable, which is the primary focus of this research.

This thesis investigates a unique methodology that allows online monitoring of an underground power cable. The methodology analyzes conventional power signals in the frequency domain to monitor the condition of a power cable.

First, the proposed approach is analyzed theoretically with the help of mathematical computations. Frequency domain analysis techniques are then used to compute the power spectral density (PSD) of the system signals. The importance of inherent noise in the system, a key requirement of this methodology, is also explained. The behavior of resonant frequencies, which are unique to every system, are then analyzed under different system conditions with the help of mathematical expressions.

Another important aspect of this methodology is its ability to accurately estimate cable fault location. The process is online and hence does not require the system to be disconnected from the grid. A single line to ground fault case is considered and the trend followed by the resonant frequencies for different fault positions is observed.

The approach is initially explained using theoretical calculations followed by simulations in MATLAB/Simulink. The validity of this technique is proved by comparing the results obtained from theory and simulation to actual measurement data.

Electric substation physical plans are developed with consideration given to lightning protection. To develop these plans utility design engineers use various methods. This thesis focuses on developing a computer program for two methods/models for substation shielding against direct lightning strokes. The first method is being used currently in the industry to protect the substation structures. The second model is a new and more physics based approach towards lightning phenomenon. Both the methods consider only direct lightning strikes that can hit the substation equipment. Hence, the travelling waves, indirect strokes or over-voltage arriving at the substation equipment are not considered. The Electro-Geometric method (EGM) based Rolling Sphere Method (RSM) is used to develop first part of the program. The aim of the program is to design the protection system for the substation equipment quickly and error free. The protection system uses lightning masts and/or shield wires to protect the station equipment. These are grounded solidly with low impedance to earth. The MATLAB based program gives a two dimensional visual representation of the zone of protection and therefore helps utility engineers to position shielding system. As this program is converted further into an executable file, it can be used on any computer to produce the results without need of any other software. The second part of the thesis focuses on developing the MATLAB code for protection of substation equipment using the Rizk model which is not used as of now for shielding system design in industry. Using more physics based model, simulation of downward lightning leader and connecting upward leader is shown.

Finally both the methods are compared. This includes consideration of a 220 kV substation layout arrangement. The equipment are protected using shielding masts and the comparison is made in terms of number of the protective equipment needed. It is found that the classical rolling sphere model gives more conservative results than the physics based model. Hence the results shows that it is possible to use present methods and still protect the equipment sufficiently.

An integrated methodology combining redundant clock tree synthesis and pulse clocked latches mitigates both single event upsets (SEU) and single event transients (SET) with reduced power consumption. This methodology helps to change the hardness of the design on the fly. This approach, with minimal additional overhead circuitry, has the ability to work in three different modes of operation depending on the speed, hardness and power consumption required by design. This was designed on 90nm low-standby power (LSP) process and utilized commercial CAD tools for testing. Spatial separation of critical nodes in the physical design of this approach mitigates multi-node charge collection (MNCC) upsets. An advanced encryption system implemented with the proposed design, compared to a previous design with non-redundant clock trees and local delay generation. The proposed approach reduces energy per operation up to 18% over an improved version of the prior approach, with negligible area impact. It can save up to 2/3rd of the power consumption and reach maximum possible frequency, when used in non-redundant mode of operation.

Underground transmission cables in power systems are less likely to experience electrical faults, however, resulting outage times are much greater in the event that a failure does occur. Unlike overhead lines, underground cables are not self-healing from flashover events. The faulted section must be located and repaired before the line can be put back into service. Since this will often require excavation of the underground duct bank, the procedure to repair the faulted section is both costly and time consuming. These added complications are the prime motivators for developing accurate and reliable ratings for underground cable circuits.

This work will review the methods by which power ratings, or ampacity, for underground cables are determined and then evaluate those ratings by making comparison with measured data taken from an underground 69 kV cable, which is part of the Salt River Project (SRP) power subtransmission system. The process of acquiring, installing, and commissioning the temperature monitoring system is covered in detail as well. The collected data are also used to evaluate typical assumptions made when determining underground cable ratings such as cable hot-spot location and ambient temperatures.

Analysis results show that the commonly made assumption that the deepest portion of an underground power cable installation will be the hot-spot location does not always hold true. It is shown that distributed cable temperature measurements can be used to locate the proper line segment to be used for cable ampacity calculations.

The electromagnetic fields near power lines that may produce adverse effects on humans are of increasing interest in a variety of situations, thus making it worthwhile to develop general-purpose software that estimates both the electric and magnetic fields accurately. This study deals with the simulations of the electric and magnetic fields near high-voltage power lines for the triangular, horizontal and vertical conductor arrangements under both balanced and unbalanced conditions.

For all three conductor arrangements, the shapes of the electric field distribution curves are different with the vertical arrangement best for minimizing right of way consideration, while the shapes of the magnetic field distributions curves are similar. Except for the horizontal arrangement, the maximum electric field magnitudes with shield conductors are larger than those without shield conductors. Among the three different arrangements, the maximum field value of the vertical arrangement is most vulnerable to the unbalanced conditions.

For both the electric and magnetic fields, increasing the heights of phase conductors gradually results in diminishing return in terms of the field reduction. In this work, both the maximum electric field magnitudes and the maximum magnetic field magnitudes produced by 500 kV power lines at 1 m height from the ground are all within the permissible exposure levels for the general public. At last, the dynamic trajectories of both fields with time are simulated and interpreted, with each field represented by a vector rotating in a plane describing an ellipse, where the vector values can be compared to high-speed vector measurements.

Clock generation and distribution are essential to CMOS microchips, providing synchronization to external devices and between internal sequential logic. Clocks in microprocessors are highly vulnerable to single event effects and designing reliable energy efficient clock networks for mission critical applications is a major challenge. This dissertation studies the basics of radiation hardening, essentials of clock design and impact of particle strikes on clocks in detail and presents design techniques for hardening complete clock systems in digital ICs.

Since the sequential elements play a key role in deciding the robustness of any clocking strategy, hardened-by-design implementations of triple-mode redundant (TMR) pulse clocked latches and physical design methodologies for using TMR master-slave flip-flops in application specific ICs (ASICs) are proposed. A novel temporal pulse clocked latch design for low power radiation hardened applications is also proposed. Techniques for designing custom RHBD clock distribution networks (clock spines) and ASIC clock trees for a radiation hardened microprocessor using standard CAD tools are presented. A framework for analyzing the vulnerabilities of clock trees in general, and study the parameters that contribute the most to the tree’s failure, including impact on controlled latches is provided. This is then used to design an integrated temporally redundant clock tree and pulse clocked flip-flop based clocking scheme that is robust to single event transients (SETs) and single event upsets (SEUs). Subsequently, designing robust clock delay lines for use in double data rate (DDRx) memory applications is studied in detail. Several modules of the proposed radiation hardened all-digital delay locked loop are designed and studied. Many of the circuits proposed in this entire body of work have been implemented and tested on a standard low-power 90-nm process.