Full metadata
Title
An Augmented DC-DC Buck Converter Using Auxiliary-Stage with Multple-Single-Cycle Non-Linear Control (MSCNLC) For Fast Load Transient Response
Description
High density dc/dc power management system for computing, automotive, and industry applications requires Power-Management-Integrated-Circuits (PMICs) to present high power-density/efficiency and fast transient response. Recently, state-of-the-art digital loads such as micro-processors, DSPs and FPGAs with high current slewing characteristics and tight supply voltage margin put increasing demand on the supply regulators. The load transient response of DC-DC buck converters with conventional two-level topology is primarily restricted by the efficiency vs. dynamic-response trade-off. In this paper, an augmented DC-DC buck converter consisting of a lower-frequency main converter and a normally-off fast-switching secondary stage operating in parallel is proposed. The main-stage of the converter uses emulated-current-mode hysteretic control. For the auxiliary transient-suppression stage a nonlinear control scheme termed multiple-single-cycle nonlinear control (MSCNLC) is developed. The proposed augmented regulator improves the load transient response without compromising the overall efficiency of the converter, breaking the well-known efficiency vs. dynamic-response trade-off. The high power-efficiency main-stage operating at switching frequency of 500kHz provides the steady-state DC regulation voltage. The auxiliary-stage adopts a small inductor of 100nH and is only activated when load transient events are detected, providing fast load response and minimizing output voltage deviation. The load transient events are detected through an output capacitor charge tracking circuit, which effectively makes the auxiliary-stage a fast Current-Controlled-Current-Source (CCCS) during load transient response. The buck converter is designed for, VIN=3V-5.5V, VOUT=0.5V-1.1V and ILOAD=0.5A-8A. It is fabricated in 0.18μm BCD process. The measurement results show that with MSCNLC enabled, the undershoot and overshoot is reduced to 27mV and 58mV during the step-up (di/dt=8A/us) and step-down (di/dt=16A/us) response with 2.5A load step by a factor of close to 2, respectively. The recovery time is improved by ~1.7x. The converter achieves a peak efficiency of 90.5% at 2.2W output power with VIN=3.3V and load regulation of 0.63mV/A at VIN=3.3V/5V and VOUT=0.5V/1.1V. The line transient response at VOUT=1V, ILOAD=1.5A for VIN=3V ↔ 3.6V and 4.5V ↔ 5.5V is smaller than the output voltage ripple peak-to-peak magnitude (8mV).
Date Created
2024
Contributors
- Guo, Fan (Author)
- Bakkaloglu, Bertan (Thesis advisor)
- Kitchen, Jennifer (Committee member)
- Ranjram, Mike (Committee member)
- Garrity, Douglas (Committee member)
- Arizona State University (Publisher)
Topical Subject
Resource Type
Extent
83 pages
Language
eng
Copyright Statement
In Copyright
Primary Member of
Peer-reviewed
No
Open Access
No
Handle
https://hdl.handle.net/2286/R.2.N.197746
Level of coding
minimal
Cataloging Standards
Note
Partial requirement for: Ph.D., Arizona State University, 2024
Field of study: Electrical Engineering
System Created
- 2024-11-01 10:43:37
System Modified
- 2024-11-01 10:43:40
- 1 month 3 weeks ago
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