Assembler for a MIPS-like Processor

This Honors Thesis describes the work done to implement an assembler for a MIPS-like processor. MIPS was a processor designed in the 1980s. While assemblers are available for the MIPS processor, the assembler described below was developed specifically for a MIPS-like processor designed as part of another project. This project was undertaken to improve the understanding of processor architecture, assembly language, machine language, and how to translate assembly instructions into machine language. Assembly language is a human readable language for writing computer programs. It is a low-level language that is processor specific. Modern languages such as C++ have to first be translated into assembly language and then translated into machine language. Machine language is the zeros and ones that the computer understands. While the original programs written in the mid 1900s were required to be written in machine language, that is no longer feasible since programs are much larger and the processors are more complex. Therefore, a means of translating from high-level languages to machine language is required. The work described here concerns the translation from assembly language to machine language.