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Crystalline silicon covers more than 85% of the global photovoltaics industry and has sustained a nearly 30% year-over-year growth rate. Continued cost and capital expenditure (CAPEX) reductions are needed to sustain this growth. Using thin silicon wafers well below the

Crystalline silicon covers more than 85% of the global photovoltaics industry and has sustained a nearly 30% year-over-year growth rate. Continued cost and capital expenditure (CAPEX) reductions are needed to sustain this growth. Using thin silicon wafers well below the current industry standard of 160 µm can reduce manufacturing cost, CAPEX, and levelized cost of electricity. Additionally, thinner wafers enable more flexible and lighter module designs, making them more compelling in market segments like building-integrated photovoltaics, portable power, aerospace, and automotive industries. Advanced architectures and superior surface passivation schemes are needed to enable the use of very thin silicon wafers. Silicon heterojunction (SHJ) and SHJ with interdigitated back contact solar cells have demonstrated open-circuit voltages surpassing 720 mV and the potential to surpass 25% conversion efficiency. These factors have led to an increasing interest in exploring SHJ solar cells on thin wafers. In this work, the passivation capability of the thin intrinsic hydrogenated amorphous silicon layer is improved by controlling the deposition temperature and the silane-to-hydrogen dilution ratio. An effective way to parametrize surface recombination is by using surface saturation current density and a very low surface saturation density is achieved on textured wafers for wafer thicknesses ranging between 40 and 180 µm which is an order of magnitude lesser compared to the prevalent industry standards. Implied open-circuit voltages over 760 mV were accomplished on SHJ structures deposited on n-type silicon wafers with thicknesses below 50 µm. An analytical model is also described for a better understanding of the variation of the recombination fractions for varying substrate thicknesses. The potential of using very thin wafers is also established by manufacturing SHJ solar cells, using industrially pertinent processing steps, on 40 µm thin standalone wafers while achieving maximum efficiency of 20.7%. It is also demonstrated that 40 µm thin SHJ solar cells can be manufactured using these processes on large areas. An analysis of the percentage contribution of current, voltage, and resistive losses are also characterized for the SHJ devices fabricated in this work for varying substrate thicknesses.
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    Title
    • Thin Silicon Heterojunction Solar Cells
    Contributors
    Date Created
    2021
    Resource Type
  • Text
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    • Partial requirement for: Ph.D., Arizona State University, 2021
    • Field of study: Materials Science and Engineering

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