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This thesis presents three novel studies. The first two works focus on galvanically isolated chip-to-chip communication, and the third research studies class-E pulse-width modulated power amplifiers. First, a common-mode resilient CMOS (complementary metal-oxide-semiconductor) galvanically isolated Radio Frequency (RF) chip-to-chip communication

This thesis presents three novel studies. The first two works focus on galvanically isolated chip-to-chip communication, and the third research studies class-E pulse-width modulated power amplifiers. First, a common-mode resilient CMOS (complementary metal-oxide-semiconductor) galvanically isolated Radio Frequency (RF) chip-to-chip communication system is presented utilizing laterally resonant coupled circuits to increases maximum common-mode transient immunity and the isolation capability of galvanic isolators in a low-cost standard CMOS solution beyond the limits provided from the vertical coupling. The design provides the highest reported CMTI (common-mode transient immunity) of more than 600 kV/µs, 5 kVpk isolation, and a chip area of 0.95 mm2. In the second work, a bi-directional ultra-wideband transformer-coupled galvanic isolator is reported for the first time. The proposed design merges the functionality of two isolated channels into one magnetically coupled communication, enabling up to 50% form-factor and assembly cost reduction while achieving a simultaneously robust and state-of-art performance. This work achieves simultaneous robust, wideband, and energy-efficient performance of 300 Mb/s data rate, isolation of 7.8 kVrms, and power consumption and propagation delay of 200 pJ/b and 5 ns, respectively, in only 0.8 mm2 area. The third works studies class-E pulse-width modulated (PWM) Power amplifiers (PAs). For the first time, it presents a design technique to significantly extend the Power back-off (PBO) dynamic range of PWM PAs over the prior art. A proof-of-concept watt-level class-E PA is designed using a GaN HEMT and exhibits more than 6dB dynamic range for a 50 to 30 percent duty cycle variation. Moreover, in this work, the effects of non-idealities on performance and design of class-E power amplifiers for variable supply on and pulse-width operations are characterized and studied, including the effect of non-linear parasitic capacitances and its exploitation for enhancement of average efficiency and self-heating effects in class-E SMPAs using a new over dry-ice measurement technique was presented for this first time. The non-ideality study allows for capturing a full view of the design requirement and considerations of class-E power amplifiers and provides a window to the phenomena that lead to a mismatch between the ideal and actual performance of class-E power amplifiers and their root causes.
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    Title
    • Techniques on Galvanically Isolated RF Chip-to-Chip Communication Circuits and Pulse-Width Modulated Class-E Power Amplifiers
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    Date Created
    2021
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    • Partial requirement for: Ph.D., Arizona State University, 2021
    • Field of study: Electrical Engineering

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