Description
As the world becomes more electronic, power electronics designers have continuously designed more efficient converters. However, with the rising number of nonlinear loads (i.e. electronics) attached to the grid, power quality concerns, and emerging legislation, converters that intake alternating current (AC) and output direct current (DC) known as rectifiers are increasingly implementing power factor correction (PFC) by controlling the input current. For a properly designed PFC-stage inductor, the major design goals include exceeding minimum inductance, remaining below the saturation flux density, high power density, and high efficiency. In meeting these goals, loss calculation is critical in evaluating designs. This input current from PFC circuitry leads to a DC bias through the filter inductor that makes accurate core loss estimation exceedingly difficult as most modern loss estimation techniques neglect the effects of a DC bias. This thesis explores prior loss estimation and design methods, investigates finite element analysis (FEA) design tools, and builds a magnetics test bed setup to empirically determine a magnetic core’s loss under any electrical excitation. In the end, the magnetics test bed hardware results are compared and future work needed to improve the test bed is outlined.
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Details
Title
- Accurate Estimation of Core Losses for PFC Inductors
Contributors
- Meyers, Tobin (Author)
- Ayyanar, Raja (Thesis advisor)
- Qin, Jiangchao (Committee member)
- Lei, Qin (Committee member)
- Arizona State University (Publisher)
Date Created
The date the item was original created (prior to any relationship with the ASU Digital Repositories.)
2019
Subjects
Resource Type
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Note
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Masters Thesis Electrical Engineering 2019