Novel electrical measurement techniques for silicon devices

Semiconductor manufacturing economics necessitate the development of innovative device measurement techniques for quick assessment of products. Several novel electrical measurement techniques will be proposed for screening silicon device parameters. The studied parameters range from oxide reliability, and carrier lifetime in MOS capacitors to the power MOSFET reverse recovery.

It will be shown that positive charge trapping is a dominant process when thick oxides are stressed through the ramped voltage test (RVT). Exploiting the physics behind positive charge generation/trapping at high electric fields, a fast I-V measurement technique is proposed that can be used to effectively distinguish the ultra-thick oxides' intrinsic quality at low electric fields.

Next, two novel techniques will be presented for studying the carrier lifetime in MOS Capacitor devices. It will be shown that the deep-level transient spectroscopy (DLTS) can be applied to MOS test structures as a swift mean for screening the generation lifetime. Recombination lifetime will also be addressed by introducing the optically-excited MOS technique as a promising tool.

The last part of this work is devoted to the reverse recovery behavior of the body diode of power MOSFETs. The correct interpretation of the LDMOS reverse recovery is challenging and requires special attention. A simple approach will be presented to extract meaningful lifetime values from the reverse recovery of LDMOS body-diodes exploiting their gate voltage and the magnitude of the reverse bias.