Description
Register file (RF) memory is important in low power system on chip (SOC) due to its
inherent low voltage stability. Moreover, designs increasingly use compiled instead of custom memory blocks, which frequently employ static, rather than pre-charged dynamic RFs. In this work, the various RFs designed for a microprocessor cache and register files are discussed. Comparison between static and dynamic RF power dissipation and timing characteristics is also presented. The relative timing and power advantages of the designs are shown to be dependent on the memory aspect ratio, i.e. array width and height.
inherent low voltage stability. Moreover, designs increasingly use compiled instead of custom memory blocks, which frequently employ static, rather than pre-charged dynamic RFs. In this work, the various RFs designed for a microprocessor cache and register files are discussed. Comparison between static and dynamic RF power dissipation and timing characteristics is also presented. The relative timing and power advantages of the designs are shown to be dependent on the memory aspect ratio, i.e. array width and height.
Details
Title
- Register files for embedded low-power applications including microprocessors
Contributors
- Vashishtha, Vinay (Author)
- Clark, Lawrence T. (Thesis advisor)
- Seo, Jae-Sun (Committee member)
- Ogras, Umit Y. (Committee member)
- Arizona State University (Publisher)
Date Created
The date the item was original created (prior to any relationship with the ASU Digital Repositories.)
2014
Resource Type
Collections this item is in
Note
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thesisPartial requirement for: M.S., Arizona State University, 2014
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bibliographyIncludes bibliographical references (p. 73-75)
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Field of study: Electrical engineering
Citation and reuse
Statement of Responsibility
by Vinay Vashishtha