Description
This dissertation presents a new hybrid fault current limiter (FCL) topology that is primarily intended to protect single-phase power equipment. It can however be extended to protect three phase systems but would need three devices to protect each individual phase. In comparison against the existing fault current limiter technology, the salient fea-tures of the proposed topology are: a) provides variable impedance that provides a 50% reduction in prospective fault current; b) near instantaneous response time which is with-in the first half cycle (1-4 ms); c) the use of semiconductor switches as the commutating switch which produces reduced leakage current, reduced losses, improved reliability, and a faster switch time (ns-µs); d) zero losses in steady-state operation; e) use of a Neodym-ium (NdFeB) permanent magnet as the limiting impedance which reduces size, cost, weight, eliminates DC biasing and cooling costs; f) use of Pulse Width Modulation (PWM) to control the magnitude of the fault current to a user's desired level. g) experi-mental test system is developed and tested to prove the concepts of the proposed FCL. This dissertation presents the proposed topology and its working principle backed up with numerical verifications, simulation results, and hardware implementation results. Conclu-sions and future work are also presented.
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Details
Title
- A neodymium hybrid fault current limiter
Contributors
- Prigmore, Jay (Author)
- Karady, George G. (Thesis advisor)
- Ayyanar, Raja (Committee member)
- Holbert, Keith E. (Committee member)
- Hedman, Kory (Committee member)
- Arizona State University (Publisher)
Date Created
The date the item was original created (prior to any relationship with the ASU Digital Repositories.)
2013
Subjects
Resource Type
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Note
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thesisPartial requirement for: Ph.D., Arizona State University, 2013
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bibliographyIncludes bibliographical references (p. 154-157)
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Field of study: Electrical engineering
Citation and reuse
Statement of Responsibility
by Jay Prigmore