Full metadata
Title
Compilation of stream programs onto embedded multicore architectures
Description
In recent years, we have observed the prevalence of stream applications in many embedded domains. Stream programs distinguish themselves from traditional sequential programming languages through well defined independent actors, explicit data communication, and stable code/data access patterns. In order to achieve high performance and low power, scratch pad memory (SPM) has been introduced in today's embedded multicore processors. Current design frameworks for developing stream applications on SPM enhanced embedded architectures typically do not include a compiler that can perform automatic partitioning, mapping and scheduling under limited on-chip SPM capacities and memory access delays. Consequently, many designs are implemented manually, which leads to lengthy tasks and inferior designs. In this work, optimization techniques that automatically compile stream programs onto embedded multi-core architectures are proposed. As an initial case study, we implemented an automatic target recognition (ATR) algorithm on the IBM Cell Broadband Engine (BE). Then integer linear programming (ILP) and heuristic approaches were proposed to schedule stream programs on a single core embedded processor that has an SPM with code overlay. Later, ILP and heuristic approaches for Compiling Stream programs on SPM enhanced Multicore Processors (CSMP) were studied. The proposed CSMP ILP and heuristic approaches do not optimize for cycles in stream applications. Further, the number of software pipeline stages in the implementation is dependent on actor to processing engine (PE) mapping and is uncontrollable. We next presented a Retiming technique for Throughput optimization on Embedded Multi-core processors (RTEM). RTEM approach inherently handles cycles and can accept an upper bound on the number of software pipeline stages to be generated. We further enhanced RTEM by incorporating unrolling (URSTEM) that preserves all the beneficial properties of RTEM heuristic and also scales with the number of PEs through unrolling.
Date Created
2012
Contributors
- Che, Weijia (Author)
- Chatha, Karam Singh (Thesis advisor)
- Vrudhula, Sarma (Committee member)
- Chakrabarti, Chaitali (Committee member)
- Shrivastava, Aviral (Committee member)
- Arizona State University (Publisher)
Topical Subject
Resource Type
Extent
xix, 230 p. : ill
Language
eng
Copyright Statement
In Copyright
Primary Member of
Peer-reviewed
No
Open Access
No
Handle
https://hdl.handle.net/2286/R.I.15224
Statement of Responsibility
by Weijia Che
Description Source
Viewed on July 8, 2013
Level of coding
full
Note
thesis
Partial requirement for: Ph.D., Arizona State University, 2012
Includes bibliographical references (p
Field of study: Computer science
System Created
- 2012-08-24 06:33:04
System Modified
- 2021-08-30 01:45:00
- 3 years 2 months ago
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