Full metadata
Title
Neuromorphic controller for low power systems from devices to circuits
Description
A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to get workload, temperature and CPU performance counter values. The controller is designed and simulated using circuit-design and synthesis tools. At device-level, on-chip planar inductors suffer from low inductance occupying large chip area. On-chip inductors with integrated magnetic materials are designed, simulated and fabricated to explore performance-efficiency trade offs and explore potential applications such as resonant clocking and on-chip voltage regulation. A system level study is conducted to evaluate the effect of on-chip voltage regulator employing magnetic inductors as the output filter. It is concluded that neuromorphic power controller is beneficial for fine-grained per-core power management in conjunction with on-chip voltage regulators utilizing scaled magnetic inductors.
Date Created
2011
Contributors
- Sinha, Saurabh (Author)
- Cao, Yu (Thesis advisor)
- Bakkaloglu, Bertan (Committee member)
- Yu, Hongbin (Committee member)
- Christen, Jennifer B. (Committee member)
- Arizona State University (Publisher)
Topical Subject
Resource Type
Extent
99 p
Language
eng
Copyright Statement
In Copyright
Primary Member of
Peer-reviewed
No
Open Access
No
Handle
https://hdl.handle.net/2286/R.I.14383
Statement of Responsibility
by Saurabh Sinha
Level of coding
full
Note
thesis
Partial requirement for: Ph.D., Arizona State University, 2011
Field of study: Electrical engineering
System Created
- 2012-08-24 06:10:51
System Modified
- 2021-08-30 01:49:46
- 3 years 2 months ago
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