Description
Ethernet switching is provided to interconnect multiple Ethernets for the exchange of Ethernet data frames. Most Ethernet switches require data buffering and Ethernet signal regeneration at the switch which incur the problems of substantial signal processing, power consumption, and transmission delay. To solve these problems, a cross bar architecture switching system for 10GBASE-T Ethernet is proposed in this thesis. The switching system is considered as the first step of implementing a multi-stage interconnection network to achieve Terabit or Petabit switching. By routing customized headers in capsulated Ethernet frames in an out-of-band control method, the proposed switching system would transmit the original Ethernet frames with little processing, thereby makes the system appear as a simple physical medium for different hosts. The switching system is designed and performed by using CMOS technology.
Details
Title
- Design of a switching system for 10GBASE-T Ethernet
Contributors
- Luo, Haojun (Author)
- Hui, Joseph (Thesis advisor)
- Zhang, Junshan (Committee member)
- Reisslein, Martin (Committee member)
- Arizona State University (Publisher)
Date Created
The date the item was original created (prior to any relationship with the ASU Digital Repositories.)
2010
Resource Type
Collections this item is in
Note
- thesisPartial requirement for: M.S., Arizona State University, 2010
- bibliographyIncludes bibliographical references (p. 64)
- Field of study: Electrical engineering
Citation and reuse
Statement of Responsibility
by Haojun Luo